Unknown
Xeon Phi
2010
desktop
Microarchitecture
Larrabee
Historical hardware entry sourced from Wikipedia: Xeon Phi.
Key specifications
- Cores
- 32 / threads
- Clock
- 1.053 GHz to 1.7 GHz
general
| Application | SupercomputersHigh-performance computing |
|---|---|
| Common manufacturer | Intel |
| Core names | Knights FerryKnights CornerKnights LandingKnights MillKnights Hill |
| Designed by | Intel |
| Discontinued | 2020[1] |
| Extensions | AVX, AVX2, AVX-512 |
| Instruction set | x86-16 (except coprocessor form factor), IA-32, x86-64 |
| L1 cache | 32 KB per core |
| L2 cache | 512 KB per core |
| Marketed by | Intel |
| Max. CPU clock rate | 1.053 GHz to 1.7 GHz |
| Memory (RAM) | Up to 384 GB and 16 GBUp to DDR4 115.4 GB/s with ECC supportMCDRAM 400+ GB/s |
| Microarchitecture | Larrabee |
| Model | Xeon Phi 3100Xeon Phi 5100Xeon Phi 7100Xeon Phi 7200 |
| Sockets | LGA 3647PCI Express 3.0 x16 |
| Technology node | 45 nm transistors to 14 nm transistors (tri-gate) |
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Sources
- WIKIPEDIA_PROCESSORS · 2 weeks ago
